Khalil-Hani, M. and Shaikh-Husin, N. (2009) “An Optimization Algorithm Based On Grid-Graphs For Minimizing Interconnect Delay In VLSI Layout Design”, Malaysian Journal of Computer Science, 22(1), pp. 19–33. Available at: https://ejournal.um.edu.my/index.php/MJCS/article/view/6351 (Accessed: 22 November 2024).